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Researcher Information

last modified:2024/03/22

Professor YAMANE Satoshi

Mail Laboratory Website

Faculty, Affiliation

Faculty of Electrical, Information and Communication Engineering,Institute of Science and Engineering

College and School Educational Field

Division of Electrical Engineering and Computer Science, Graduate School of Natural Science and Technology
Division of Electrical Engineering and Computer Science, Graduate School of Natural Science and Technology
Course in Information and Communication Engineering, School of Electrical, Information and Communication Engineering, College of Science and Engineering

Laboratory

Computer software TEL:076-234-4856 FAX:076-234-4900

Academic Background

【Academic background(Doctoral/Master's Degree)】
Kyoto University Master Graduate School, Division of Engineering Completed
【Academic background(Bachelor's Degree)】
Kyoto University
【Degree】
Dr. Eng. Computer Science

Career

Kanazawa University faculty of engineering(2001/08/01-)

Year & Month of Birth

Academic Society



IEEE computer society
IEICE
JIPS
IEICE
JIPS
IEICE
IEICE
IEICE
IEICE
JIPS
IEICE
IEICE
IEICE
IEICE
IEICE
IEICE
IEICE
Language and Automaton
Information processing society of japan
japan society for software science and technology
The Institute of Electronic, Inforomation and Communication Engineers
The Institute of Electronic, Inforomation and Communication Engineers
The Japanese Society for Artificial Intelligence

Award

The Japanese Society for Artificial Intelligence
The Japanese Society for Artificial Intelligence
○IEEE GCCE2021 Outstanding Student Paper Award(2021/10/16)
○CANDAR Workshop Outstanding Poster Paper(2021/11/30)
○MineRL Competition 2020 世界6位(2021/03/19)
○MineRL Competition 2020 世界6位(2021/03/19)
○MineRL Competition 2020 世界6位(2021/03/19)
○best paper of CST(2008/06/30)
○GESTS best paper(2006/03/01)

Specialities

verification specification theory、Theory of informatics、Software、Computer system

Speciality Keywords

Artificial Intelligence, Software Model Checking, Machine Learning, Deep Learning, Deep Reinforcement Learning, Generative Adversarial Networks, Timed Automata, Temporal logic, System Verification of Embedded System, Data Science

Research Themes

design, verification and implementation of real-time software

design, verification and implementation of real-time software We study probabilistic timed CEGAR(CounterExample Guided Abstractuin and Refinement).

Formal modeling, specification and verification of embedded systems

Formal modeling, specification and verification of embedded systems We study modeling, specification and verification method for dynamically reconfigurable systems.
Also, we study dynamic hybrid CEGAR.

Machine learning

Distributed paralllel real-time systems

Books

  •  Hybrid automaton Ohmsha 7 1 21-29 2010/08

Papers

  •  Combined Constraint on Behavior Cloning and Discriminator in Offline Reinforcement Learning Shunya Kidera; Kosuke Shintani; Toi Tsuneda; Satoshi Yamane IEEE Access 2024/02 
  •  An Efficient Reduction of Timer Interrupts for Model Checking of Embedded Assembly Programs Satoshi Yamane, Taro Kriyama, Yajun Wu electronics 13 2 2024/01 
  •  Extrinsicaly Rewarded Soft Q Imitation Learning with Discriminator Ryoma Furuyama, Daiki Kuyoshi, Satoshi Yamane 2024/01 
  •  Staged Depthwise Correlation and Feature Fusion for Siamese Object Tracking Dianbo Ma, Jianqiang Xiao, Ziyan Gao, Satoshi Yamane: 2023 International Joint Conference on Neural Networks (IJCNN) 2023/06 
  •  Formal verification of Task manegiment module of real-time OS using bounded model checking  S. Koshiba, S.Yamane 2022-SE-213 213 1-8 2023/03/10

show all

  •  Enhanced Full Attention Generative Adversarial networks kaixu chen ,satoshi yamane IEICE Transactions on Information & Systems 106 5 1-5 2023/03/31
  •  M-DenseUNet: Multi Dense Encoder Connected UNet for Biomedical Image Segmentation Tongdan Jin, Kaixu Chen, Satoshi Yamane, Yoshihiro Kuroda IEEE GCCE2022 919-921 2022/10/23
  •  Regularization to Suppress Mode Collapse in GANs Using Image Similarity Kuniyasu Imade, Taro Kiriyama, Satoshi Yamane IEEE GCCE2022 635-636 2022/10/23
  •  Accelerating Model Validation by Reconstructing Image Sets Using GAN Toshiki Hatano; Taro Kiriyama; Toi Tsuneda; Satoshi Yamane 2021 International Conference on Computational Science and Computational Intelligence (CSCI) 2022/06/22
  •  Single and Ensemble CNN Models with Out-Category Penalty for Image Classification Yuta Suzuki, Daiki Kuyoshi, Satoshi Yamane International Journal of Networking and Computing 12 2 339-358 2022/10/20 
  •  Loss Function of GAN to Make a Clear Judgment Kuniyasu Imade, Toi Tsuneda, Satoshi Yamane, Kousuke Shintani, Taro Kiriyama International Symposium on Computing and Networking Workshops 478-480 2021/11/23 
  •  Single and Ensemble CNN Models with Out-Category Penalty in Cifar 10 Yuta Suzuki, Daiki Kuyoshi, Satoshi Yamane International Symposium on Computing and Networking Workshops 464-467 2021/11/23 
  •  GANs with Suppressed Mode Collapse Using Intrinsic Rewards Toi Tsuneda, Taro Kiriyama, Kosuke Shintani, Satoshi Yamane International Symposium on Computing and Networking Workshops 187-192 2021/11/23 
  •  Modeling, Specification and Model checking of dynamically reconfigurable processors Satoshi Yamane Computer Software 28 1 190-216 2011/01 
  •  automatic verification of statecharts by abstraction and refinement of hierachical structure Shinichi Yamazaki, S.Yamne 26 3 155-170 2009/08 
  •  Development of probabilistic timed strong simulation verifier of probabilistic timed automata Satoshi Yamane Computer Software 25 3 148-193 2008/08 
  •  Formal verification of real-time systems S.Yamane 25 3 81-87 2008/08 
  •  A Classifier for Reducing Numerical Errors using Ensemble Method Yuta Suzuki, Toi Tsuneda, Daiki Kuyoshi, Satoshi Yamane IEEE GCCE2021 2021 10 653-654 2021/10/12 
  •  Reduction of Timer Interrupts for Embedded Assembly Programs Based on Reduction of Interrupt Handler Executions Taro Kiriyama, Yajun Wu, Satoshi Yamane IEEE GCCE2021 2021 10 464-466 2021/10/12 
  •  A study of DQN using VisionTransformer as an image extractor Toshiki Hatano, Toi Tsuneda, Satoshi Yamane IEEE GCCE2021 2021 10 345-346 2021/10/12 
  •  Enhanced EVA with Threshold Limit of Similarity Toi Tsuneda, Kuniyasu Imade, Kousuke Shintani, Satoshi Yamane IEEE GCCE2021 2021 10 329-331 2021/10/12 
  •  Population Based Training for Text Classification Using Convolutional Neural Network Xie Zhang; Mo Li; Satoshi Yamane IEEE GCCE2021 2021 10 77-79 2021/10/12 
  •  SAFPN: Self Adapted Feature Pyramid Networks for Object Detection Zhiying Zhou, Jianqiang Xiao, Satoshi Yamane IEEE GCCE2021 2021 10 1-3 2021/10/12 
  •  Shuffle in 3D: A Lightweight Architecture for Stereo Matching Jianqiang Xiao, Satoshi Yamane IEEE GCCE2021 2021 10 675-677 2021/10/12 
  •  Proposal of Ephemeral Value Adjustment with Dimensionality Reduction in Deep Reinforcement Learning Daiki Kuyoshi, Yuta Suzuki, Satoshi Yamane IEEE GCCE2021 2021 10 672-674 2021/10/12 
  •  Enhanced Conditions Based Deep Convolutional Generative Adversarial Networks Kaixu Chen, Zhengxuan Zhao, Satoshi Yamane IEEE GCCE2021 2021 10 663-665 2021/10/12 
  •  CBAM-Unet++: easier to find the target with the attention module "CBAM" Zhengxuan Zhao, Kaixu Chen, Satoshi Yamane IEEE GCCE2021 2021 10 655-657 2021/10/12 
  •  Conditions Based Generative Adversarial Networks with attention module for Image Generation Kaixu Chen, Zhengxuan Zhao and Satoshi Yamane The 12th International Workshop on Networking, Computing, Systems, and Software 1-6 2021/11/23
  •  Optimizing 3D Convolution Kernels on Stereo Matching for Resource Efficient Computations Jianqiang Xiao, Dianbo Ma, Satoshi Yamane  Sensors 21 20 1-18 2021/10/13 
  •  An Image Classification Model that Learns Image Features and Numerical Information Yuta Suzuki, Toshiki Hatano, Toi Tsuneda, Daiki Kuyoshi, Satoshi Yamane International Journal of Networking and Computing 11 2 426-437 2021/07/28 
  •  GBDT Modeling of Deep Reinforcement Learning Agents Using Distillation Toshiki Hatano, Toi Tsuneda, Yuta Suzuki, Kuniyasu Imade, Kazuki Seshimo and Satoshi Yamane IEEE International Conference on Mechatronics (ICM2021) 2021 2021/03/30
  •  Image Classification with Additional Non-decision Labels using Self-supervised learning and GANs Toshiki Hatano, Toi Tsuneda, Yuta Suzuki, Satoshi Yamane International Workshop on Networking, Computing, Systems, and Software 125-129 2020/11/24
  •  An Image Classification Model that Learns MNIST Image Features and Numerical Information Yuta Suzuki, Toshiki Hatano, Toi Tsuneda, Satoshi Yamane International Workshop on Networking, Computing, Systems, and Software 483-485 2020/11/24
  •  Q-learning in Continuous Action Space by Extending EVA Toi Tsuneda Daiki Kuyoshi, Satoshi Yamane International Workshop on Networking, Computing, Systems, and Software 489-491 2020/11/24
  •  Efficient Exploration by Decision Making Considering Curiosity and Episodic Memory in Deep Reinforcement Learning Daiki Kuyoshi, Kuniyasu Imade, Satoshi Yamane International Workshop on Networking, Computing, Systems, and Software 465-467 2020/11/24
  •  Transfer Learning Algorithm for Object Detection Yuta Suzuki, Daiki Kuyoshi, Satoshi Yamane International Workshop on Networking, Computing, Systems, and Software 10 1 1-3 2021/01/01 
  •  Practical Evaluation of Online Heterogeneous Machine Learning Kazuki Seshimo, Akira ohta, Daichi Nishio, Satoshi Yamane  IEICE Trans. Information and Systems 103 12 2620-2631 2020/12/01 
  •  Model checking of embedded systems using RTCTL Y. Wu, S. Yamane RIMS KOKYUROKU 2088 9-13 2018/08/01 
  •  Model Checking of Real-Time Properties for Embedded Assembly Program Using Real-Time Temporal Logic RTCTL and Its Application to Real Microcontroller Software Yajun WU, Satoshi Yamane  IEICE Trans. Information and Systems 103 4 800-812 2020/04/01
  •  Formal Specification and verification of hybrid Systems in Formal Methods Satoshi Yamane Fundamental review 2 1 22-34 2008/08/01 
  •  Random Projection in Neural Episodic Control Daichi Nishio, Satoshi Yamane Proceedings of Machine Learning Research 101 1-15 2019/11/17 
  •  Angle Estimation Network Using Polar Transformation for Object Classification Nishiki Katayama, Satoshi Yamane IEEE GCCE2020 2020 9 652-653 2020/10/13
  •  Text Classification Using Convolutional Neural Network by Genetic Algorithms Mo Li, Xie Zhang, Satoshi Yamane, Ang Yang Lin IEEE GCCE2020 2020 9 188-190 2020/10/13
  •  Proposal of Quantized Tree-LSTM and Its Experimental Evaluation Kazuki Takamura, Satoshi Yamane IEEE GCCE2020 2020 9 280-282 2020/10/13
  •  Transfer Learning Model for Image Segmentation by Integrating U-Net++ and SE Block Yuta Suzuki, Satoshi Yamane IEEE GCCE2020 2020 9 129-131 2020/10/13
  •  Boosting Binary Neural Networks for FPGA Toshiki Hatano, Satoshi Yamane IEEE GCCE2020 2020 9 837-839 2020/10/13
  •  Discriminator Soft Actor Critic Without Extrinsic Rewards Daichi Nishio, Toi Tsuneda, Daiki Kuyoshi, Satoshi Yamane IEEE GCCE2020 2020 9 147-150 2020/10/13
  •  Comparative Experiment of SPIN and SMT in Model Checking of Embedded Assembly Program Satoshi Yamane, Kosuke Umemura IEEE GCCE2020 2020 9 63-66 2020/10/13
  •  Software Model Checking for Real-Time Properties of Embedded Assembly Programs Based on Lazy Abstraction and Refinement Yajun Wu, Hiromu Kamide, Satoshi Yamane  IEEE GCCE2020 2020 9 71-74 2020/10/13
  •  Software model checking for verifying real-time properties of embedded assembly programs based on Lazy Abstraction and refinement H .Kamide, S. Yamane RIMS KOKYUROKU 京都大学数理解析研究所 2154 1 1-8 2020/04/01 
  •  Probabilistic Timed CEGAR S.Yamane Transaction on programming language 5 2 43-66 2012/03
  •  Case study of Modeling, Specification and Finite model checking for preemptive embedded software Masashi Hayashi, S.Yamane I 93 7 1214-1225 2010/07
  •  Case study of Modeling, Specification and Finite model checking for preemptive embedded software Shingo Takinai, S. Yamane IEICE TRANSACTIONS ON INFORMATION AND SYSTEMS 93 11 2403-2415 2010/11
  •  A verification by strong probabilistic timed simulation relation using probabilistic zone graphs Y. Hashizume, S.Yamane IEICE TRANSACTIONS ON INFORMATION AND SYSTEMS 92 1 25-38 2009/01
  •  Deductive Probabilistic Verification Methods for Embedded and Ubiquitous Computing S. Yamane,T. Kanatani LECTURE NOTES IN COMPUTER SCIENCE 3207 1 163-195 2004/08
  •  Deductive Probabilistic Timed Verification S.Yamane 4 1 1-10 2005/04
  •  Automata-Theoretic Performance Analysis Method of Soft Real-Time Systems S. Yamane LECTURE NOTES IN COMPUTER SCIENCE 3823,pp 1211-1224 2005/11
  •  Timed Weak Simulation Verification and its application to Stepwise Refinement of Real-Time Software S.Yamane LECTURE NOTES IN COMPUTER SCIENCE 3824 381-394 2005/11
  •  Deductive Probabilistic Verification Methods of Safety, Liveness and Nonzenoness for Distributed Real-Time Systems S.Yamane LECTURE NOTES IN COMPUTER SCIENCE 3820,pp 332-345 2005/12
  •  Specification and Verification Techniques of Embedded Systems using Probabilistic Linear Hybrid Automata Y. Mutsuda, T. Kato, S. Yamane LECTURE NOTES IN COMPUTER SCIENCE 3820,pp 346-360 2005/12
  •  The automatic verification system for real-time systems using symbolic model-checking S.Yamane AMAST SERIES IN COMPUTING VOl.8 137-152 2007/03
  •  Theory and practice of probabilistic timed game for Embedded Systems S.Yamane LECTURE NOTES IN COMPUTER SCIENCE 4523,pp 109-120 2007/05
  •  A New Approach to Specify and Verify Embedded Systems consisting of CPU and DRP R.Yanase, S.Yamane The 18th IEEE Pacific Rim International Symposium on Dependable Computing 18 1-2 2012/08
  •  Trace-mining Profile for Large-Scale Distributed Framework Hadoop Yusuke Shimizu, Kouhei Sakurai, Satoshi Yamane The 18th IEEE Pacific Rim International Symposium on Dependable Computing 18 1-2 2012/08
  •  Hybrid Automata Theoretic Specification and Verification of CPU-DRP Embedded Systems R.Yanase, S.Yamane Bulletin of Networking, Computing, Systems, and Software 1 1 16-20 2012/12
  •  Development of SMT-Based Bounded Model Checker for Embedded Assembly Program J.Kobashi, A.Takeshita, S.Yamane IEEE 3rd Global Conference on Consumer Electronics 1-4 2014/10/09
  •  Model Generation by the Exhaustive Search for Embedded Assembly Programs and Application to Model Checking R.Konoshita, S. Yamane, K.Sakurai IEEE 3rd Global Conference on Consumer Electronics 1-4 2014/10/09
  •  Development of Probabilistic Timed CEGAR Satoshi Yamane, Takaya Shimizu IEEE International Conference on Systems and Informatics 1-10 2014/11/19
  •  A method of generating traces of Hadoop YARN by lightweight profile data Yosuke Nakagawa, Kouhei Sakurai, Satoshi Yamane Annual Meeting on Advanced Computing System and Infrastructure 1-6 2015/01/26
  •  Parallel Distributed Graph Clustering Algorithm on Apache Spark with Node Partition and Aggregation in Large-Scale Graphs R.Asayama, K.Sakurai,S.Yamane International Workshop on Innovative Algorithms for Big Data 1 1 1-2 2015/09/13
  •  Formal Verification of Dynamically Reconfigurable Systems  R.Yanase, T.Sakai,M.Sakai,S.Yaname IEEE 4th Global Conference on Consumer Electronics (GCCE 2015) 4 2015/10/27 
  •   Distributed CFG-based Symbolic Execution for Assembly Programs  T.Adachi, S.Yamane, K.Sakurai IEEE 4th Global Conference on Consumer Electronics (GCCE 2015) 4 76-80 2015/10/27 
  •  Integration of Supervised and Unsupervised Learning for Deep Neural Network T.Uchiyama, S.Yamane,K.Sakurai,T.Kurita The Korea-Japan joint workshop on Frontiers of Computer Vision (FCV) 2016/02/23
  •  LogChamber: Inferring Source Code Locations Corresponding to Mobile Applications Run-time Logs Yuki Ono, Kouhei Sakurai, Satoshi Yamane  Journal of Information Processing 24 4 700-710 2016/07/07
  •   Detecting Bank Conflict of GPU Programs Using Symbolic Execution K.Hamaya, S.Yamane IEEE 5th Global Conference on Consumer Electronics (GCCE 2015) 5 1-3 2016/10/12 
  •  A Case Study of Formal Approach to Dynamically Reconfigurable Systems by Using Dynamic Linear Hybrid Automata  Ryo Yanase, Tatsunori Sakai, Makoto Sakai and Satoshi Yamane Lecture Notes in Computer Science 10009 10009 74-89 2016/11/15 
  •  Abstraction Refinement for Non-Zeno Fairness Verification of Linear Hybrid Automata R.Yanase, S.Yamane 10th IEEE International Conference on Software Testing, Verification and Validation (ICST 2017)Doctoral Symposium 10 1 2017/03/17 
  •  Recognition of Rotated Images by Angle Estimation Using Feature Map with CNN Nishiki Katayama, Satoshi Yamane IEEE GCCE2017 2017 1-4 2017/10/24
  •  Formal Probabilistic Refinement Verification Method of Embedded Real-Time Systems Satoshi Yamane IEEE Workshop on Software Technologies for Future Embedded Systems. WSTFES 2003 1 1 79-82 2003/05/01
  •  Formal verification of real-time software by symbolic model checker Satoshi Yamane International Conference on Application of Concurrency to System Design 1 10 1998/03/10
  •  A method for the Specifications and Verification of Distributed Systems by Timed Automaton Satoshi Yamane Systems and Computers in Japan 28 2 10 1997/12/12
  •  Symbolic Model-checking method based on approximation and BDDs for real-time systems S. Yamane LECTURE NOTES IN COMPUTER SCIENCE 1281 23 1997/10/10
  •  The symbolic model-checking for real-time systems Satoshi Yamane Concurrency:theory and applications,RIMS,KYOTO University 996 21 1997/10/10
  •  Automatic Verification Method for distributed and concurrent systems using timed language inclusion Satoshi Yamane Scalable Computing: Practice and Experience 1 2 14 1998/06/10
  •  Specifications and Verification Method of Concurrent Systems by Restricted Timed Automaton S. Yamane LECTURE NOTES IN COMPUTER SCIENCE 1231 15 1997/05/10
  •  Study on verification method of statechart by fixpoint computation Satoshi Yamane Systems and Computers in Japan 27 13 12 1997/06/01
  •  A Practical Hierachical Design by Timed Simulation Relations for Real-Time Systems Satoshi Yamane LECTURE NOTES IN COMPUTER SCIENCE 1641 17 1999/10/10
  •  Faster Deep Q-learning using Neural Episodic Control D. Nishio, S. Yamane CoRR abs/1801.01968 (2018) 42 1-6 2018/06/01 
  •  Rainbow with Episodic Memory in Deep Reinforcement Learning Daiki Kuyoshi, Toi Tsuneda, Satoshi Yamane IEEE GCCE2020 2020 9 1-4 2020/10/13
  •  Invite paper: Deductively Verifying Embedded Software in the Era of Artificial Intelligence = Machine Learning + Software Science Satoshi Yamane IEEE GCCE2017 2017 1-4 2017/10/24
  •  Model Check of Real-time Property of Embedded Assembly Program Using CEGAR Hiromu Kamide, Kosuke Uemura, Satoshi Yamane IEEE COMPSAC 2018 42 42 799-800 2018/07/23
  •  Machine Translation Considering Context Informaiton Using Encoder-Decoder Model Satoshi Yamane, Tetsuto Takano IEEE COMPSAC 2018 42 42 793-794 2018/07/23
  •  Model Checking of Embedded Systems Using RTCTL while Generating Timed Kripke Structure Yajun Wu, S. Yamane IEEE COMPSAC 2018 42 42 1 2018/07/23
  •  Faster Deep Q-learning using Neural Episodic Control D. Nishio, S. Yamane IEEE COMPSAC 2018 42 42 1-6 2018/07/23
  •  Machine translation considering context informaiton using Encoder-Decoder model T. Takano, S. Yamane CoRR arXiv:1904.00160 (2019) 1-4 2019/03/01
  •  Online Heterogeneous Mixture Learning for Big Data Kazuki Seshimo, Ota Akira, Nishio Daichi, Yamane Satoshi arXiv:1906.08068 (2019) 1-2 2019/06/01
  •  Verification Method of Safety Properties of Embedded Assembly Program by Combining SMT-Based Bounded Model Checking and Reduction of Interrupt Handler Executions Satoshi Yamane, Jumpei Kobashi, Kousuke Uemura Electronics in the Section Computer Science & Engineering 2020, 9(7) 9 7 1-24 2020/06/27 
  •  Deductive Verification Method of Real-Time Safety Properties for Embedded Assembly Programs S.Yamane Electronics in the Section Computer Science & Engineering 2019, 8(10) 8 10 1-16 2019/10/14 
  •  Generalize IoT Device's Client Application with Virtual Machine H.Kawakami, S.Yamane IEEE GCCE2019 2019 8 992-995 2019/10/16
  •  Online Heterogeneous Mixture Learning for Big Data K.Seshimo, A.Ohta, D.Nshio, S.Yamane IEEE GCCE2019 2019 8 699-701 2019/10/16
  •  SMT-Based Bounded Model Checking of Embedded Assembly Program with Interruptions Satoshi Yamane, Kousuke Uemura The 17th IEEE International Conference on Dependable, Autonomic and Secure Computing 17 1 633-639 2019/08/05
  •  Similarity Calculation for Face Verification with Convolutional Neural Network Nishiki Katayama, Satoshi Yamane SICE Annual Conference 2017 2017 2017/09/12
  •  Improving Minimal Gated Unit for Sequential Data K.Takamura, S.Yamane IEEE GCCE2019 2019 8 696-698 2019/10/16
  •  Simulation and Model checking of embedded assembly program Satoshi Yamane,Tomonori Kato,Ryosuke Konoshita ESS2016 2016/10/20
  •   Model checking of embedded assembly program based on simulation S.Yamane, R.Konoshita, T.Kato IEICE Transactions on Information and Systems  100 8 1819-1826 2017/08/01
  •  Fault-tolerant Performance Evaluation of Hadoop MapReduce by Fault-Injection Using AspectJ  Yosuke Nakagawa, Kohei Sakurai,Yusuke Shimizu, Satosahi Yamane Transaction on of IPSJ 7 1 35-45 2014/03/25 
  •  Discriminator Soft Actor Critic without Extrinsic Rewards Daichi Nishio, Daiki Kuyoshi, Toi Tsuneda, Satoshi Yamane CoRR abs/2001.06808 (2020) 1-7 2020/01/19
  •  Design analysis method of soft real-time systems using UML and timed automata Satoshi Yamane Transactions of Information Processing Society of Japan 48 9 2410-2421 2007/09
  •  Timed Weak Simulation Verification and its application to Stepwise Refinement of Real-Time Software S. Yamane 6 1 192-203 2006/01
  •  Formal Verification Method Based on Binary Decision Diagrams for Distributed/Concurrent Systems Satoshi Yamane  Journal of Japanese Society for Artificial Intelligence 13 1 8 1998/01
  •  Extended real-time temporal logic and model checking verification method Satoshi Yamane Transactions of the Japanese Society for Artificial Intelligence 12 3 8 1997/07
  •  Formal Development Methodology based on Unified Semantic Models for Reactive Systems Satoshi Yamane Transactions of Information Processing Society of Japan 41 3 16 2000/03
  •  Hierachical design method for real-time systems by timed simulation relations Satoshi Yamane Transactions of Information Processing Society of Japan 40 7 15 1999/07
  •  Hierarchical Design Method for Open Distributed Systems Satoshi Yamane Transactions of Information Processing Society of Japan 40 4 17 1999/04
  •  Formal specification and verification method for hard real-time systems Satoshi Yamane Transactions of Information Processing Society of Japan 42 6 13 2001/06
  •  Formal development methodology of hybrid systems based on both control theory and computer science Satoshi Yamane 469-4 2002/06
  •  Refinement Theory of Embedded systems based on Hybrid models Satoshi Yamane 455-4 2002/06
  •  Real-Time Symbolic Model Checking for Hard Real-Time Systems Satoshi Yamane Proc. International Conference on Real-Time Computing Systems and Applications 7 4 1999/11
  •  Deductive Refinement Verification Methods based on Assume-Guarantee Style and their Experimental Evaluations of Real-Time Software Satoshi Yamane International Conference on Software Engineering, Artificial Intelligence, Networking and Parallel/Distributed Computeing 2 8 2001/08
  •  Modular Specification and Verification Method for Hybrid Real-time Systems Satoshi Yamane Proc. International Conference on Real-Time Computing Systems and Applications 10 8 2002/03
  •  Hierarchical design method real-time distributed systems Satoshi Yamane Proc. International Workshop on Real-Time Computing Systems and Applications 6 4 1998/11
  •  Deductive Schedulability Verification Methodology of Real-Time Software using both Refinement Verification and Hybrid Automata Satoshi Yamane IEE PROCEEDINGS-COMPUTERS AND DIGITAL TECHNIQUES 27 1 527-533 2003/11
  •  Probabilistic Timed Simulation Verification and Its Application to Stepwise Refinement of Real-Time Systems LECTURE NOTES IN COMPUTER SCIENCE 2896 1 276-290 2003/12
  •  Formal refinement verification method of real-time systems with discrete probability distributions 2 202-215 2003/04
  •  Development and Evaluation of Symbolic Model-Checker Based on Approximation for Real-Time Systems Satoshi Yamane IEICE Transactions 86 4 232-247 2003/04
  •  Probabilistic Timed Bisimulation relation and \\\\ Satoshi Yamane IPSJ Journal 45 5 1201-127 2004/05
  •  Formal Refinement verification method of real-time systems with discrete probability distributions IPSJ Journal 44 8 2189-2199 2003/08
  •  Modular Specification and Verification Method for Hybrid Systems Satoshi Yamane 44 3 867-9 2003/03
  •  Formal Verification of schedulability of real-time software 209-2 2003/01
  •  Refinement Verification of Hybrid Automata for Embedded Systems 203-2 2003/01
  •  Performance analysis method of soft real-time systems by timed automata S. Yamane Vol.46, No11,pp 2410-2421 2005/11
  •  Symbolic Reachability Analysis of Probabilistic Linear Hybrid Automata Y. Mutsuda, T. Kato, S.Yamane IEICE transaction on fundamentals Vol.E88-A No.11, pp 2972-2981 2005/11
  •  Refinement design method of real-time systems based on timed waek simulation verification. J88-D-I,No.10,pp 1555-1570 2005/10
  •  Deductive Verification Method of Probabilistic Timed LTL 45 6 1421-1430 2004/06
  •  Detecting Bank Conflict of GPU Programs Using Symbolic Execution - Case Study Khoki Hamaya, Satoshi Yamane Journal of Software Engineering and Applications 10 2 159-167 2017/02/21 
  •  SMT-Based Model Checking by Analyzing Embedded Assembly Program  J.Kobashi, A.Takeshita, S.Yamane EMBEDDED SYSTEM SYMPOSIUM2014 22-27 2014/10/23 
  •  Model Checking by Modeling for Embedded Assembly Programs  R.Konoshita, S. Yamane, K.Sakurai EMBEDDED SYSTEM SYMPOSIUM2014 13-21 2014/10/23 
  •  Distributed Online Decision Tree Learning for Stream Data Based on Actor Model Koichi Yamamoto, Kohei Sakurai, Satoshi Yaman WebDB Forum 2014 1-8 2014/11/19
  •  Specification language of dynamic reconfigurable systems Hidefumi Yamada, Yuki Nakai, Satoshi Yamane Transaction on programming language of IPSJ 6 3 1-19 2013/12/20 
  •  Rechability analysis of probabilistic linear hybrid automaton Journal of information processing society 53 12 2671-2681 2012/12
  •  Development of Model Checker of Dynamic Linear Hybrid Automata R.Yanase IEEE 37th COMPSAC 37 2013/07

Conference Presentations

  • Proposal of multi-product low volume production system using BlockChain technology and Petri-net description(2018/09/12)
  • Deductive Verification methods of real-time properties for embedded assembly program(2018/06/15)
  • Deductive Verification of real-time safety properties for embedded assembly program using theorem prover Princess(conference:MSS)(2018/03/13)
  • Deductive Verification methods of real-time properties for embedded assembly program(2018/03/13)
  • Invite paper: Deductively Verifying Embedded Software in the Era of Artificial Intelligence = Machine Learning + Software Science(conference:IEEE GCCE2017)(2017/10/27)

show all

  • Deductive Verification methods of real-time properties for embedded assembly program(2017/06/20)
  • Verification method of real-time properties for embedded assembly program(conference:IEICE Technical Reprt MSS2016)(2017/03/16)

Others

  •  Formal specification and verification of hybrid systems in formal methods for embedded systems S. Yamane Fundamental review 2 1 22-34 2008/08/01 
  •  Special Section on Concurrent/Real-time and Hybrid Systems: Theory and Applications 91 11 2008/11

Arts and Fieldwork

Patent

Theme to the desired joint research

○Verification of embedded software

Grant-in-Aid for Scientific Research

○「時相論理と並行計算,オートマトンの統合化による自律性のある分散システムの設計支援」(1999-2001) 
○「ハイブリッドモデルによる組込みシステムの高信頼性設計方法論の構築と支援環境の開発」(2002-2004) 
○「述語抽象化検証による大規模組込みシステム向きオブジェクト指向設計自動検証手法」(2007-2009) 
○「音響心理の定量的計測を目標とした心理モデルの構築と実験的検討」(1997-1998) 
○「割込みを持つ組込みアセンブリプログラムのリアルタイム性のソフトウェアモデル検査」(2021-2023) 
○「組込みアセンブリプログラムのリアルタイム性検証」(2018-2020) 
○「革新的ソフトウェアモデル検査による組込みアセンブリプログラムの安全性検証」(2015-2017) 
○「動的ハイブリッドオートマトンによる動的再構成可能組込みシステムの高度な設計検証」(2012-2014)
○「動的ハイブリッドオートマトンによる動的再構成可能組込みシステムの高度な設計検証」(2012-2014) 

Competitive research funding,Contribution

Collaborative research,Consignment study

Classes (Bachelors)

○Distributed System B(2022)
○Distributed System A(2022)
○Advanced Topics on Information & Communication Engineering B(2022)
○Advanced Topics on Information & Communication Engineering A(2022)
○Basics of Information B(2022)
○Basics of Information A(2022)
○Student-Initiated Project(2022)
○Object-oriented Programming B(2022)
○Object-oriented Programming A(2022)
○Compiler B(2022)
○Compiler A(2022)
○Operating Systems B(2022)
○Operating System A(2022)
○Operating Systems(2021)
○Distributed System B(2020)
○Distributed System A(2020)
○Operating System B(2020)
○Operating System A(2020)
○Compiler A(2020)
○Advanced Topics on Information & Communication Engineering B(2020)
○Discrete math(2020)
○Student-Initiated Project(2020)
○Basics of Information B(2020)
○Basics of Information A(2020)
○Advanced Topics on Information & Communication Engineering A(2020)
○Compiler B(2020)
○Operating Systems A(2020)
○Operating Systems B(2020)
○Distributed Computing A(2020)
○Distributed Computing B(2020)
○Operating Systems(2020)
○Compiler(2020)
○Operating Systems B(2020)
○Compiler(2020)
○Compiler(2020)
○Distributed Computing B(2020)
○Distributed Computing A(2020)
○Operating Systems B(2019)
○Operating Systems A(2019)
○Compiler(2019)
○Compiler(2018)
○Distributed Computing(2018)
○Operating Systems(2018)
○Operating Systems(2018)
○Computer System(2018)
○Distributed Computing(2017)
○Compiler(2017)
○Computer System(2017)
○Operating Systems(2017)
○Computer System(2017)
○Operating Systems(2016)
○Distributed Computing(2016)
○Compiler(2016)
○Computer System(2016)
○study in undergraduate course(2016)
○study in undergraduate course(2015)
○Operating System(2015)
○Compiler(2015)
○Disributed Computing(2015)
○Computer System(2015)
○study in undergraduate course(2014)
○Computer system(2014)
○Compiler(2014)
○Operating system(2014)
○Principle of software science(2014)
○study in undergraduate course(2013)
○study in undergraduate course(2013)
○Special lecture of infromation system(2013)
○Operating system(2013)
○Computer system(2013)
○Introduction(2013)
○Introduction to electronic, information system and bioinfomatics(2013)
○Compiler(2013)
○Principle of software science(2013)

Classes (Graduate Schools)

○Distributed parallel real-time systems(2018)
○Distributed parallel real-time systems(2017)
○Verification of Distributed, Parallel and Real-Time Systems(2017)
○Verification of Distributed, Parallel and Real-Time Systems(2017)
○Verification of Distributed, Parallel and Real-Time Systems(2017)
○Verification of Distributed, Parallel and Real-Time Systems(2017)
○Distributed parallel real-time systems(2016)
○Verification of Distributed, Parallel and Real-Time Systems(2016)
○Design and verification of distributed real-time systems(2015)
○Distributed, parallel and real-time system(2015)
○Design and verification of distributed and real-time system(2014)
○Verification theory(2014)
○Special lecture on sofutoware science(2014)
○Verification theory(2013)
○Distributed and real-time systems(2013)
○Software Engineering(2013)

International Project

International Students

Lecture themes

Others (Social Activities)

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